The present invention relates to the manufacture of semiconductor chips. More specifically, the present invention relates to a method and apparatus for providing a deep well in the production of CMOS devices.
In CMOS fabrication processes, well (or tub) structures are needed to electrically separate n-channel and p-channel MOSFETs. High-energy (MeV) ion implantation is needed to form a deep well with a depth of 800 to 2,000 nm. The projection range RP of the high-energy implant is typically 400 to 1,000 nm. For such a high-energy implant, the channeling effect, in which the dopant profile possesses a long tail along certain crystal orientations, is a major problem in well formation. The channeling effect degrades the electrical isolation capability of a well.
For uniform implantation, it is a common practice to implant the dopant with a tilt angle rather than implant vertically to the silicon wafer (zero-tilt) to avoid axial channeling. However, due to present small transistor sizes, the tilt angle can distort the implant symmetry (i.e. the placement of precise doping and concentration). If scanning or batch implantation techniques are also used, this problem will be compounded. Therefore, it is desirable to avoid axial channeling while using a zero tilt implant.
It is an object of the invention to provide high-energy implants with minimal channeling effect.
It is another object of the invention to provide high-energy implants with minimal implant symmetry distortion.
Accordingly, the foregoing objects are accomplished on a semiconductor substrate, by forming a buried amorphous layer within the semiconductor substrate, forming a deep well layer below the buried amorphous layer, and then recrystallizing the buried amorphous layer.
Other features of the present invention are disclosed or apparent in the section entitled: xe2x80x9cDETAILED DESCRIPTION OF THE INVENTION. xe2x80x9d